1. Technical Field
The present invention relates to a semiconductor integrated circuit, and more particularly, to an apparatus and method for generating an internal voltage.
2. Related Art
In general, semiconductor integrated circuits are supplied with an external power supply voltage VDD and a ground voltage VSS from an external device and generate internal voltages such as a high-level voltage VPP and a bulk voltage VBB. The semiconductor integrated circuit detects whether the current internal voltage is higher than a target level. When the internal voltage is lower than the target level, the semiconductor integrated circuit pumps up the internal voltage and keeps the internal voltage at the target level.
A general internal voltage generating apparatus generates an internal voltage according to an output signal of a voltage detector that detects the target level.
The voltage detector includes a normal detecting unit that outputs a fixed level detection signal and a modulating unit that outputs a variable level detection signal, and uses a fuse circuit to selectively output the fixed level detection signal and the variable level detection signal. The fixed level detection signal indicates whether the internal voltage reaches a fixed reference level regardless of a variation in temperature, and the variable level detection signal indicates whether the internal voltage reaches a variable reference level according to the variation in temperature.
Next, the operation of the internal voltage generating apparatus according to the related art will be described below with reference to FIG. 1.
FIG. 1 is a graph illustrating the operation of an internal voltage generating apparatus of a semiconductor integrated circuit according to the related art, and the bulk voltage VBB is used as the internal voltage.
In the graph, a solid line A indicates the target level of a bulk voltage of a normal detecting unit that varies according to the temperature, and a solid line B indicates the target level of a bulk voltage of a modulating unit that varies according to the temperature.
As can be seen from the graph shown in FIG. 1, the normal detecting unit determines whether the bulk voltage is higher than−0.8 V regardless of the variation in temperature. When the bulk voltage is higher than−0.8 V (when the absolute value is smaller than 0.8 V), a fixed level detection signal output from the normal detecting unit is enabled, so that the internal voltage is generated.
However, as the temperature increases, the modulating unit lowers the target level of the bulk voltage and detects the target level. As shown in FIG. 1, when the semiconductor integrated circuit is under the condition of−40° C., the modulating unit determines whether the bulk voltage is higher than −0.5 V. When the semiconductor integrated circuit is under the condition of 120° C., the modulating unit determines whether the bulk voltage is higher than −1.2 V.
When the normal detecting unit sets a fixed voltage level to generate a bulk voltage regardless of the variation in temperature, it is difficult to cope with the variation in the characteristics of transistors provided in the semiconductor integrated circuit. In the semiconductor integrated circuit, since the threshold voltage of a cell transistor increases when it is at a low temperature, it is necessary to increase a bulk voltage level (to decrease an absolute value) to compensate for the increase in the threshold voltage. However, it is difficult to realize such a technique by detecting only the fixed level.
When a variable level is set according to a variation in temperature to generate a bulk voltage, it is possible to compensate for the threshold voltage of the cell transistor in a low temperature environment, as described above. However, when the target level of the cell transistor is lowered in a high temperature environment (when the absolute value increases), an increment in the threshold voltage of the cell transistor due to the bulk voltage that is decreased (the absolute value that is increased) by an internal voltage generating circuit is larger than a decrease in the threshold voltage of the cell transistor due to an increase in temperature, which makes it difficult to input/output data.
Therefore, preferably, a variable target level should be set to follow the solid line B in a low temperature environment and a fixed target level should be set to follow the solid line A in a high temperature environment, on the basis of a point C, which is an intersection of the solid line A and the solid line B. However, this technique has not been used in the related art, and as a result, it is difficult to generate an effective bulk voltage. Therefore, it is necessary to realize a technique for efficiently setting the target levels of other internal voltages in addition to the bulk voltage.